Packet switching (Data transmission)

This dissertation proposes amodular Artificial Neural Network (ANN) based buffer allocation and routing control model for ATM switching networks. The proposed model considers limited buffer capacity which can adversely impact the switching performance of ATM switching networks. The proposed ANN based approach takes advantage of the favorable control characteristics of neural networks such as high adaptability and high speed collective computing power for effective buffer utilization. The proposed model uses complete sharing buffer allocation strategy and enhances its performance for high traffic loads by regulating the buffer allocation process dynamically via a neural network based controller. In this study, we considered the buffer allocation problem in the context of routing optimization in ATM networks. The modular structure of the proposed model separates the buffer allocation from the actual routing of ATM cells through the switching fabric and allows adaptation of the neural control for routing to different switching structures. The influence of limited buffer capacity, routing conflicts, statistical correlation between arriving ATM cells and cell burst length on ATM switching performance are analyzed and illustrated through computer simulation.

This dissertation proposes YACAD (Yet Another Congestion Avoidance Design for ATM-based Networks), a congestion prevention model that includes admission control, traffic shaping, and link-by-link flow control for ATM-based networks. Network traffic in this model is composed of real-time traffic and data traffic. As real-time traffic is delay-sensitive and connection-oriented, its call acceptance is based upon the effective bandwidth at all nodes. Effective bandwidth is defined as a vector of bandwidth and maximum node delay. As data traffic can be either connection-oriented or connectionless, it is subject to link-by-link flow control based on a criterion known as effective buffer which is defined as a scalar of buffer size. Data traffic is not delay-sensitive but is loss-sensitive. Traffic shaping is imposed on real-time traffic to ensure a smooth inflow of real-time cells. YACAD also allocates a large buffer (fat bucket) to data traffic to accommodate sudden long bursts of data cells. Absence of data cell loss is a major feature of YACAD. Two simulation studies on the performance of the model are conducted. Analyses of the simulation results show that the proposed congestion avoidance model can achieve congestion-free networking and bounded network delays for real-time traffic at high levels of channel utilization. The maximum buffer requirements for loss-free cell delivery for data traffic, and the cell loss probabilities for real-time traffic are also obtained. In addition, results of performance comparisons to other similar models have shown that YACAD outperforms several other leaky-bucket based congestion control methods in terms of cell loss probability for real-time traffic. The simulation source program has also been verified using existing queueing theories, and the Paired-t Confidence Interval method with satisfactory results at 99% confidence level.

In order to guarantee a committed Quality of Service (QoS) to the users of a Broadband Integrated Services Digital Network (B-ISDN), preventive congestion control becomes critical, and is implemented through Call Acceptance Control (CAC) and Usage Parameter Control (UPC) functions. Currently, Asynchronous Transfer Mode (ATM) cells are equipped with a 1-bit Cell Loss Priority (CLP) field, which can be used for service-oriented and/or UPC marking. This creates a conflict, since these two marking approaches may have contradicting objectives, and are designed to operate independently. Moreover, by admitting excessive cells as marked traffic, this group is allowed to grow uncontrollably, thereby jeopardizing the QoS committed to other marked cells. This dissertation presents a solution to these problems by proposing a new 4-class priority strategy that unifies the two marking approaches, and is based on a 2-bit CLP field. The impacts of the new priority scheme are triple-fold: (I) For the UPC, a new scheme, the Forgiving Leaky Bucket (FLB), not only carries priorities through subnetwork boundaries, but also has the power of unmarking, i.e. forgiving, previously marked cells, depending on the bandwidth availability in the entering subnetwork. Forgiving will correct access-point bias, a phenomenon observed in internetworked ATM subnetworks of different congestion conditions. (II) At ATM switching nodes, a new space priority scheme is based on a hybrid of the Nested Threshold, and Push-Out cell discarding methods. This scheme is designed for the 4-class priority strategy, and improves the quality of the low priority traffic. (III) In interfacing High Speed Local Area Networks and Metropolitan Area Networks, idle bandwidth due to STM multiplexing is utilized to carry marked excessive cells of connection-oriented variable bit rate traffic, in addition to the service-oriented marking performed at transmitting stations. The resulting stream is then carried through internetworking points, subject to FLB adjustments. As a result, the STM and ATM subnetworks will support a uniform end-to-end priority strategy, essential for a B-ISDN. The proposed impacts are analyzed and compared with conventional implementations, and future directions are indicated.

This research is aimed towards the concept of a new switching node architecture for cell-switched Asynchronous Transfer Mode (ATM) networks. The proposed architecture has several distinguishing features when compared with existing Banyan based switching node. It has a cylindrical structure as opposed to a flat structure as found in Banyans. The wrap around property results in better link utilization as compared with existing Banyans beside resulting in reduced average route length. Simplified digit controlled routing is maintained as found in Banyans. The cylindrical nature of the architecture, results in pipeline activity. Such architecture tends to sort the traffic to a higher address, eliminating the need of a preprocessing node as a front end processing node. Approximate Markov chain analyses for the performance of the switching node with single input buffers is presented. The analyses are used to compute the time delay distribution of a cell leaving the node. A simulation tool is used to validate the analytical model. The simulation model is free from the critical assumptions which are necessary to develop the analytical model. It is shown that the analytical results closely match with the simulation results. This confirms the authenticity of the simulation model. We then study the performance of the switching node for various input buffer sizes. Low throughput with single input buffered switching node is observed; however, as the buffer size is increased from two to three the increase in throughput is more than 100%. No appreciable increase in node delay is noted when the buffer size is increased from two to three. We conclude that the optimum buffer size for large throughput is three and the maximum throughput with offered load of 0.9 and buffer size three is 0.75. This is because of head of line blocking phenomenon. A technique to overcome such inherent problem is presented. Several delays which a cell faces are analyzed and summarized below. The wait delay with buffer sizes one and two is high. However, the wait delay is negligible when the buffer size is increased beyond two. This is because increasing the buffer size reduces the head of line blocking. Thus more cells can move forward. Node delay and switched delay are comparable when the buffer size is greater than two. The delay offered is within a threshold range as noted for real time traffic. The delay is clock rate dependent and can be minimized by running the switching node at a higher clock speed. The worst delay noted for a switched cell for a node operating at a clock rate of 200 Mhz is 0.5 usec.

In past and recent literature, random access protocols have been investigated with growing interest. In particular, the Slotted ALOHA protocol has been extensively used in satellite communications, and has also attracted considerable attention in many areas of wireless communication systems, especially in the cellular mobile environment. In this thesis, we investigate the performance of Slotted ALOHA, an effective random access protocol, in a Weibull fading environment. We study the performance metrics based on the signal-to-interference-and-noise ratio (SINR) model, in a cellular network system, assuming two captures models. The capture effect, also called co-channel interference tolerance, is the ability to correctly receive a strong signal from one transmitter despite significant interference from other transmitters. We derive closed-formed expressions and numerical evaluations for both the capture probability and the system throughput. he analytical results will be validated with computer simulations. Finally, to mitigate the effects of Weibull fading channel we also consider the effect of dual selection diversity that will increase the capture probability and the system throughput.